Verilog risc-v

Open-source Verilog projects categorized as risc-v
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Topics: Verilog Fpga Rv32i Riscv Asic
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Top 10 Verilog risc-v Projects

  • darkriscv

    opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

  • serv

    SERV - The SErial RISC-V CPU

    • Project mention: RISC-V support in Android just got a big setback | news.ycombinator.com | 2024-04-30

    > Right now, most devices on the market do not support the C extension

    This is not true and easily verifiable.

    The C extension is defacto required, the only cores that don't support it are special purpose soft cores.

    C extension in the smallest IP available core https://github.com/olofk/serv?tab=readme-ov-file

    Supports M and C extensions https://github.com/YosysHQ/picorv32

    Another sized optimized core with C extension support https://github.com/lowrisc/ibex

    C extension in the 10 cent microcontroller https://www.wch-ic.com/products/CH32V003.html

    This one should get your goat, it implements as much as it can using only compressed instructions https://github.com/gsmecher/minimax

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  • riscv

    RISC-V CPU Core (RV32IM)

    • Project mention: Ultraembedded RISCV Module | /r/RISCV | 2023-08-04

    I have been trying to execute some instructions to the ultraembedded riscv module https://github.com/ultraembedded/riscv

  • biriscv

    32-bit Superscalar RISC-V CPU

    • Project mention: Need help with designing a basic RISC V processor? | /r/RISCV | 2023-06-21

  • icestation-32

    Compact FPGA game console

    • Project mention: The 8-Bit Era: Eight Iconic Processor Designs – By Babbage | news.ycombinator.com | 2023-12-04

    > Or maybe there's a RV32I community for writing retro style games, with some simple graphics support?

    Wow, https://github.com/dan-rodrigues/icestation-32 looks cool. Sorry for the comment spam. :)

  • airisc_core_complex

    Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional peripherals for embedded AI applications and smart sensors.

  • Hazard3

    3-stage RV32IMACZb* processor with debug

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  • RISC-V

    Design implementation of the RV32I Core in Verilog HDL with Zicsr extension

    • Project mention: Prototype Demonstration of a 32-bit RISC-V Softcore with FreeRTOS | /r/FPGA | 2023-06-03

    The project repository and the details about the paper can be found here.

  • ITA-CORES

    RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32

    • Project mention: SoC RISC-V: An ASIC Implementation of the FEMTORV32 | news.ycombinator.com | 2023-12-20

  • fpga_riscv_cpu

    fpga verilog risc-v rv32i cpu

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020).

Verilog risc-v related posts

Index

What are some of the best open-source risc-v projects in Verilog? This list will help you:

Project Stars
1 darkriscv 1,900
2 serv 1,261
3 riscv 1,040
4 biriscv 749
5 icestation-32 149
6 airisc_core_complex 74
7 Hazard3 70
8 RISC-V 45
9 ITA-CORES 34
10 fpga_riscv_cpu 8

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