Top 6 Verilog Rv32i Projects

darkriscv

3 1,916 6.2 Verilog

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
riscv

2 1,040 1.8 Verilog

RISC-V CPU Core (RV32IM)

Project mention: Ultraembedded RISCV Module | /r/RISCV | 2023-08-04

I have been trying to execute some instructions to the ultraembedded riscv module https://github.com/ultraembedded/riscv

InfluxDB

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biriscv

6 749 0.0 Verilog

32-bit Superscalar RISC-V CPU

Project mention: Need help with designing a basic RISC V processor? | /r/RISCV | 2023-06-21

RISC-V

1 47 7.6 Verilog

Design implementation of the RV32I Core in Verilog HDL with Zicsr extension

Project mention: Prototype Demonstration of a 32-bit RISC-V Softcore with FreeRTOS | /r/FPGA | 2023-06-03

The project repository and the details about the paper can be found here.

ITA-CORES

1 36 8.7 Verilog

RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32

Project mention: SoC RISC-V: An ASIC Implementation of the FEMTORV32 | news.ycombinator.com | 2023-12-20

fpga_riscv_cpu

1 8 1.1 Verilog

fpga verilog risc-v rv32i cpu

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020).

Verilog Rv32i related posts

Need help with designing a basic RISC V processor?

5 projects | /r/RISCV | 21 Jun 2023
Не слабо так у турков бомбануло после сожжения Корана у посольства Турции в Стокгольме

1 project | /r/tjournal_refugees | 24 Jan 2023
As an undergrad in my 3rd year with what feels like very little basics down, is implementing a basic RISC-V 5-stage pipelined processor on an FPGA too complex a project for an undergrad student?

1 project | /r/FPGA | 9 Jan 2022
BiRISC-V – 32-bit Superscalar RISC-V CPU

1 project | news.ycombinator.com | 20 Jul 2021
Need help learning how to use risc-v toolchain

2 projects | /r/FPGA | 22 Jun 2021
[github] biRISC-V - 32-bit dual issue RISC-V CPU

1 project | /r/chipdesign | 6 Jan 2021
[github] biRISC-V - 32-bit dual issue RISC-V CPU

1 project | /r/RISCV | 6 Jan 2021
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Index

What are some of the best open-source Rv32i projects in Verilog? This list will help you:

	Project	Stars
1	darkriscv	1,916
2	riscv	1,040
3	biriscv	749
4	RISC-V	47
5	ITA-CORES	36
6	fpga_riscv_cpu	8

Verilog Rv32i

Top 6 Verilog Rv32i Projects

darkriscv

riscv

InfluxDB

biriscv

RISC-V

ITA-CORES

fpga_riscv_cpu

Verilog Rv32i related posts

Need help with designing a basic RISC V processor?

Не слабо так у турков бомбануло после сожжения Корана у посольства Турции в Стокгольме

As an undergrad in my 3rd year with what feels like very little basics down, is implementing a basic RISC-V 5-stage pipelined processor on an FPGA too complex a project for an undergrad student?

BiRISC-V – 32-bit Superscalar RISC-V CPU

Need help learning how to use risc-v toolchain

[github] biRISC-V - 32-bit dual issue RISC-V CPU

[github] biRISC-V - 32-bit dual issue RISC-V CPU

Index